As defined in the specification and claims of the present disclosure a process is a program composed of an ordered set of instructions and a set of data associated with the instructions that can be executed by a data processing system to perform a job ordered or requested by a user. A process can be carried out by a processor, which is a hardware device of a data processing system. The processor is capable of controlling the execution of instructions associated directly with the process and in processing data associated with several processes.
When a large number of processes simultaneously seek access to the same processor, managing the execution priorities of the processes, as well as communication of the processes to the processor, is extremely complex. However, data processing systems have been developed in which these problems have been solved. One solution to these problems is described in "French Patent Nos. 2,253,419 and 2,253,417, respectively entitled "Process Management System For A Data Processor" and "Process Synchronization Using Semaphores", in the name of the assignee of the present invention. However, the development of large scale integration (LSI) calculating units favors the development of data processing systems utilizing several processors or microprocessors in a single data processing system. A problem which arises in connection with the use of several microprocessing systems is allocating the processes to the processors of the system. Allocating the processes to the several processors is a time consuming operation of varying complexity, according to the choice of algorithms which are employed in the processes. The more complicated the algorithms, the greater risk there is of disturbing tables including parameters necessary for operatinq the data processing system.
It is, therefore, an object of the present invention to provide a new and improved device for allocating processes to several processors.
Another object of the invention is to provide a new and improved device for allocating processes to processors with a very high performance factor, with an average degree of complexity.
Another object of the invention is to provide a device for enabling several processes to be executed by several LSI processors that share a common central memory.